1. Field of Invention
This invention relates to a bumping process. More particularly, the present invention is related to a method for etching the adhesive layer made of a titanium layer or an aluminum layer of the UBM layer (Under Bump Metallurgy layer) through a sulfuric acid solution serving as an etchant.
2. Related Art
In this information explosion age, integrated circuit products are used almost everywhere in our daily life. As fabricating technique continue to improve, electronic products having powerful functions, personalized performance and a higher degree of complexity are produced. Nowadays, most electronic products are relatively light and have a compact body. Hence, in semiconductor production, various types of high-density semiconductor packages have been developed. Flip chip is one of the most commonly used techniques for forming an integrated circuit package. Moreover, compared with a wire-bonding package or a tape automated bonding (TAB) package, a flip-chip, package uses a shorter electrical path on average and has a better overall electrical performance. In a flip-chip package, the bonding pads on a die and the contacts on a substrate are connected together through a plurality of bumps formed by the method of bumping process. Accordingly, the technology of bumping process becomes more and more important in the advanced packaging fields.
Referring to FIG. 1A, it shows a flow chart illustrating the process flow of a conventional bumping process. The conventional bumping process mainly comprises the following steps. Firstly, a substrate is provided as shown in the step of S100. The substrate may be a silicon base or a wafer. Next, an under bump metallurgy layer is formed on the substrate as shown in the step of S102. Generally speaking, the under bump metallurgy is made of an adhesive layer, a barrier layer and a wetting layer. Then, the step S104 of patterning the barrier layer and the wetting layer is performed to define the locations for disposing bumps. Namely, a photo-resist is formed to cover the portions of the wetting layer and the barrier layer for disposing the bumps thereon and then the residual portions of the wetting layer and the barrier layer not covered by the photo-resist layer are removed to expose the adhesive layer. Afterwards, as shown in the step of S106, another photo-resist layer is provided to cover the exposed adhesive layer to expose the residual portions of the wetting layer, and the step of plating process is then performed to form solder bumps on the residual portions of the wetting layer. Next, as shown in the step of S108, the portions not covered by the solder bumps are removed. Finally, the solder bumps are reflowed (step of S110) to be fixed securely on the residual portions of the wetting layer and shaped into a ball-like shape.
Next, referring to FIG. 1B, it shows a flow chart illustrating the process flow of another conventional bumping process. This conventional bumping process mainly comprises the following steps. Firstly, a substrate is provided as shown in the step of S200. The substrate may be also a silicon base or a wafer. Next, an under bump metallurgy layer is formed on the substrate as shown in the step of S202. Generally speaking, the under bump metallurgy is made of an adhesive layer, a barrier layer and a wetting layer. Then, the step of S204 of forming bumps above the bonding pads of the substrate and on the portions of the wetting layer that are not covered by a patterned photo-resist layer is performed. Next, as shown in the step of S206, the bumps are served as masks so as to perform the removing process to remove the portions of the wetting layer and the barrier layer not covered by the bumps so as to expose the adhesive layer. Then, as shown in the step of S208, the portions of the adhesive layer not covered by the wetting layer and the barrier layer are removed. Finally, as shown in the step of S210, the bumps are reflowed to be fixed on the residual portions of the wetting layer and to be shaped into ball-like shape.
In the aforementioned conventional bumping processes, the under bump metallurgy layer applicable to the bumping process for the copper wafer mainly comprises a titanium layer, a nickel-vanadium layer and a copper layer. Therein, a hydrogen-fluorine solution (HF) is usually taken as an etchant for patterning the copper layer; a sulfuric acid solution (H2SO4) or a dilute phosphoric solution mainly comprising deionized water (DI water), phosphoric acid (CH3COOH), acetic acid (H3PO4) and hydrogen peroxide (H2O2), wherein the composition of said etchant can be refereed to U.S. Pat. No. 5,508,229, is taken as an etchant to define the nickel-vanadium layer. A hydrogen-fluorine solution is also usually taken as the etchant to define or pattern the titanium layer. However, the etchant (said hydrogen-fluorine solution) is very dangerous so that said hydrogen-fluorine solution is not able to be applicable to the bumping process.
Besides, the under bump metallurgy layer applicable to the bumping process for the aluminum wafer mainly comprises an aluminum layer, a nickel-vanadium layer and a copper layer. The etchant for patterning the aluminum layer comprises phosphoric acid, acetic acid and deionized water (DI). Therein, 83% of the etchant is phosphoric acid; 11% of the etchant is acetic acid; and 6% of the etchant is deionized water. However, the mentioned-above etchant is able to attack the bumps so as to make the volume of the bumps smaller and smaller. In such a manner, the precision of the volume of the bumps is not able to be well controlled. Accordingly, there are restrictions to take the hydrogen-fluorine solution and the phosphoric acid solution as etchants.
Moreover, in the conventional bumping process, when a portion of the photo-resist layer is left, the surface of the bumps will be contaminated. In addition, the etchant taken to remove the UBM layer will also contaminate the surface of the bumps.
Therefore, providing another method for forming bumps to solve the mentioned-above disadvantages is the most important task in this invention.